1. Field of the Invention
The present invention relates to a nanosilicon semiconductor substrate manufacturing method and a semiconductor circuit device using a nanosilicon semiconductor substrate manufactured by the method.
2. Description of the Related Art
Conventionally, a semiconductor circuit device is formed on a silicon substrate having a single-crystal structure. A threshold voltage (VT) of a MOS transistor formed on the substrate is changed by, for example, executing ion implantation to forcibly dope the silicon substrate under a gate region with an impurity (Japanese Patent Laid-Open No. 5-47782). The “threshold voltage” indicates a gate voltage, and normally, VT at which a drain current starts flowing in a MOS transistor.
The ion implantation also suppresses a short channel effect that takes place when the channel length (gate length) of the MOS transistor decreases (Japanese Patent Laid-Open No. 6-216333). The “short channel effect” indicates a degradation phenomenon in a MOS transistor characteristic which occurs when microfabrication increases the electric field applied between the drain and source, extends the space-charge layer (depletion layer) near the drain, and shortens the actual channel length.
A power MOS transistor formed on a silicon substrate sometimes employs a vertical transistor structure which flows a channel current (drain current) in a direction perpendicular to the wafer surface. To do this, an opening is formed at a predetermined position of the silicon substrate by dry etching so that the silicon on the inner surface of the opening serves as a channel.
A conventional MOS transistor formed on a silicon single-crystal substrate adopts a method of doping a channel region with an impurity by ion implantation to control the threshold voltage and prevent the short channel effect caused by reducing the channel length. That is, the MOS transistor uses a method of increasing the impurity concentration in the channel region. For example, without voltage application, a depletion layer width W of a p-n junction formed between a silicon substrate and the source or drain of an n-channel MOS transistor is given by W ∞ (Eg/NB)1/2 here Eg is the bandgap energy, and NB is the substrate concentration. Ion implantation used to suppress the short channel effect increases the substrate concentration NB and decreases the depletion layer width W. The threshold voltage (VT) is given by VT ∞ (NB)1/2. Hence, a desired threshold voltage is obtained by controlling the substrate concentration NB. However, since the impurity amount (dose) of ion implantation has an upper limit, the threshold voltage (VT) cannot be more than a predetermined value. For this reason, the depletion layer width W cannot be less than a predetermined value, either.
The above-described impurity doping in the channel region by ion implantation requires activation of the doping impurity and annealing for recovering damage upon ion implantation. However, when the channel length of the MOS transistor is very short, it is necessary to prevent the source and drain diffusion layers from spreading. For this purpose, the annealing temperature must be low. At a low annealing temperature, the ion-implanted layer cannot sufficiently recover from the damage, resulting in degradation of the transistor such as a decrease in the mobility of electrical charges that move through the channel.
It is an object of the present invention to solve the above-described problem which arises when a conventional silicon MOS transistor is microfabricated.
In the power MOS transistor having the above-described vertical structure, it is very difficult to change the threshold voltage by implanting ions into the vertical channel portion of the vertical transistor. It is therefore impossible to control the threshold voltage by ion implantation. The threshold voltage is determined by the initial impurity concentration of the silicon substrate.
It is therefore another object of the present invention to control the threshold voltage of a power MOS transistor having the above-described vertical structure independently of the substrate concentration.